This application claims the benefit of the Korean Patent Application No. P2001-024664 filed on May 7, 2001, which is hereby incorporated by reference.
1. Field of the Invention
The present invention relates to an etchant, and particularly, to an etchant for patterning indium tin oxide. Although the present invention is suitable for a wide scope of applications, it is particularly suitable for preventing damage on the underlying layers and precipitation during an etching process.
2. Discussion of the Related Art
Generally, indium tin oxide (ITO) used as a transparent electrode in a display device is etched to form a pattern using a mixed solution of HCl and HNO3 or oxalic acid (C2H2O4). In addition, an etching process of amorphous ITO (a-ITO) to fabricate a thin film transistor display device will be described with reference to the drawings as follows.
FIG. 1 is a plane view for a unit pixel showing a thin film transistor display device. As shown therein, a gate line 2 and a data line 4 are arranged to cross each other. A pixel electrode 8 formed of a transparent metal such as ITO is disposed at the pixel area defined by the gate line 2 and the data line 4. On the other hand, a gate insulating film (not shown) is disposed between the gate line 2 and the data line 4 for an electrical insulation. A thin film transistor (TFT) is formed at the crossed point of the gate line 2 and the data line 4 in order to drive each pixel.
More specifically, the TFT includes a gate electrode 2a connected to the gate line 2, a gate insulating film (not shown) covering the gate electrode 2a, an active area 5 formed on the gate insulating film as a pattern form, and a source electrode 4a and a drain electrode 4b formed at the active area 5 to be apart from each other. In addition, the drain electrode 4b is connected to the pixel electrode 8 through a contact hole 9.
FIGS. 2A to 2D are sequential cross-sectional views illustrating fabrication processes along line IIxe2x80x94II of FIG. 1.
As shown therein, a fabrication method includes forming a gate electrode 2a on a glass substrate 1, and depositing a gate insulating layer 3, an amorphous silicon 5a, and an n+ amorphous silicon 5b having a high concentration n-type ions injected therein are sequentially formed over the gate electrode 2a and the glass substrate 1 (shown in FIG. 2A). An active area 5 is formed by patterning the amorphous silicon 5a and an n+ amorphous silicon 5b, and a source electrode 4a and a drain electrode 4b are formed by depositing Mo on the active area 5, and then patterned to form the respective portions separated by a certain distance from the center portion of the n+ amorphous silicon 5b. 
In FIG. 2B, the source and drain electrodes 4a and 4b are formed to extend over the end portions of the amorphous silicon 5a and the n+ amorphous silicon 5b, and onto a portion of the gate insulating layer 3. Here, portions of the n+ amorphous silicon 5b are exposed between the source electrode 4a and drain electrode 4b. 
Thereafter, in FIG. 2C, a passivation film 7 is deposited over the above structure FIG. 2B. An ITO electrode 8 is formed over the drain electrode 4b after exposing the upper part of the drain electrode 4b by forming a contact hole 9 on the passivation film 7 through a photolithography process.
As shown in FIG. 2D, the ITO electrode 8 pattern, which is located at the area where the thin film transistor is not formed and is connected to the exposed drain electrode 4b, is formed by patterning the deposited ITO electrode 8 through the photolithography process using the mixed solution of HCl and HNO3 or oxalic acid as an etching solution.
Hereinafter, the process of patterning the ITO electrode 8 using the conventional etching solution and the fabrication method of the thin film transistor display device will be described in more detail as follows.
As shown in FIG. 2A, a metal is deposited on the glass substrate 1 to form the gate electrode 2a by patterning the metal through a photolithography process.
The gate insulating film 3 and the amorphous silicon 5a and the n+ amorphous silicon 5b are sequentially deposited over the above structure.
As shown in FIG. 2B, a photoresist is formed on the entire surface of the above structure, and exposed and developed to form a photoresist pattern located at the upper peripheral part of the amorphous silicon 5a and the n+ amorphous silicon 5b facing into the gate electrode 2a. 
The amorphous silicon 5a and the n+ amorphous silicon 5b are etched by an etching process using a photoresist pattern as an etching mask to form the active area 5.
The remaining photoresist pattern is removed, and a Mo layer is deposited on the entire surface. Then, the structure is patterned again using a photolithography process to form the source electrode 4a and the drain electrode 4b, which are located at the upper left and right parts and the side parts of the active area 5.
In addition, as shown in FIG. 2C, the passivation film 7 is deposited on the above structure. A photoresist layer is formed on the passivation film 7, and exposed and developed to form a pattern for exposing the passivation film 7.
In FIG. 2D, a contact hole 9 for exposing a part of the drain electrode 4b is formed by etching the exposed passivation film 7. Thereafter, ITO is deposited on the surface of the above structure to form an ITO electrode 8.
FIG. 3 is a cross-sectional view showing a cross-section along line IIIxe2x80x94III of FIG. 1. As shown therein, a pin hole 10 may be formed in the passivation film 7, and the pin hole 10 exposes a part of the data line 4.
A photoresist layer is formed on the surface of the ITO electrode 8, and then, exposed and developed to form a pattern. Thereafter, the ITO electrode 8 pattern, which is connected to the drain electrode 4b and located at the area where the thin film transistor is not formed, is formed by an etching process using the photoresist pattern as an etching mask.
In this process, when a mixed solution of HCl and HNO3 is used as an etching solution, the etching solution contacts the data line 4 through the pin hole 10 formed on the passivation film 7. Therefore, the data line 4 formed of Mo is etched.
The mixed solution of HCl and HNO3 generally used in the process is mixed with water at a rate of 18.5% and 4.5% in weight, respectively. When such an etching solution is used, an etching rate for Mo reaches as fast as 10 xc3x85/sec, thereby damaging the source electrode 4a and the drain electrode 4b. 
As described above, if a part of the data line 4 is etched, a disconnection occurs at the data line 4. Therefore, the mixed solution of HCl and HNO3 cannot be used as an etching solution for the thin film transistor display device using Mo as a source electrode and a drain electrode.
Therefore, oxalic acid in which solid C2H2O4 is dissolved in water is used as an etching solution. Oxalic acid does not etch the Mo source and drain electrodes, which are exposed by the pin hole unlike the mixed solution of HCl and HNO3. However, the C2H2O4 aqueous solution, which C2H2O4 is dissolved in water, is precipitated as C2H2O4 powder when it is dried after ITO is etched. The precipitated C2H2O4 powder sticks to a pipe line, a nozzle, a valve, a flow meter, and a pump, etc. of the etching apparatus. Therefore, the equipment is damaged, and problems such as a wrong operation of a sensor and a conveying error in the apparatus may be occurred.
Therefore, oxalic acid cannot be used in a track type and a roller conveying type equipment due to the above problems.
As described above, the mixed solution of HCl and HNO3 used for etching ITO in the conventional art etches the Mo base source and drain electrodes through the pin hole generated in the passivation film. Therefore, the liquid crystal display device is deteriorated.
Accordingly, the present invention is directed to an etchant for patterning indium tin oxide and a method of fabricating a liquid crystal display device using the same that substantially obviates one or more of problems due to limitations and disadvantages of the related art.
Another object of the present invention is to provide an etchant for patterning indium tin oxide for preventing Mo from being etched and precipitation of the etch solution.
Additional features and advantages of the invention will be set forth in the description which follows and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, an etchant for patterning indium tin oxide is a mixed solution of HCl, CH3COOH, and water.
In another aspect of the present invention, a method of fabricating a liquid crystal display device includes forming a gate electrode on a substrate, forming a gate insulating layer and an amorphous silicon layer on the gate electrode including the substrate, forming an active area by patterning the amorphous silicon layer, forming a source electrode and a drain electrode on the active area, forming a passivation layer on the source electrode and the drain electrode and the gate insulating layer, forming a contact hole exposing a part of the drain electrode, forming an indium tin oxide layer on the passivation layer, and forming an indium tin oxide electrode by selectively etching the indium tin oxide layer using a mixed solution of HCl, CH3COOH, and water as an etchant.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.